Backtracking-based instruction scheduling to fill branch delay slots
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Publication:1871072
DOI10.1023/A:1020601110391zbMath1012.68017OpenAlexW1548038410MaRDI QIDQ1871072
Ivan D. Baev, Santosh G. Abraham, Waleed M. Meleis
Publication date: 6 May 2003
Published in: International Journal of Parallel Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1023/a:1020601110391
compiler optimizationVLIWglobal schedulinginstruction schedulingEPICinstruction-level parallel processors
Theory of compilers and interpreters (68N20) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)
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