Application of the simulated annealing local search technique to problems of redundancy elimination in functional and parametric tests of integrated circuits

DOI10.1016/S0378-4754(02)00222-7zbMath1023.65057OpenAlexW1979004537MaRDI QIDQ1873059

J. Feller, L. J. Stuehler, J. S. Ledford, W. T. jun. O'Grady, W. Mergenthaler, B. Mauersberg

Publication date: 19 May 2003

Published in: Mathematics and Computers in Simulation (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0378-4754(02)00222-7

zbMATH Keywords

numerical examplecombinatorial optimizationsimulated annealingintegrated circuitsredundancy eliminationtest cost reduction

Mathematics Subject Classification ID

Numerical mathematical programming methods (65K05) Combinatorial optimization (90C27) Analytic circuit theory (94C05)

Cites Work

• Combinatorial optimization. Theory and algorithms.
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