Indentification of inductive properties during verification of synchronous sequential circuits

DOI10.1007/BF00881716zbMath0828.68108OpenAlexW2033383995MaRDI QIDQ1893131

Yanyan Li

Publication date: 3 July 1995

Published in: Journal of Automated Reasoning (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf00881716

zbMATH Keywords

backward reasoningfinite-state machine

Mathematics Subject Classification ID

Uses Software

• HOL

Cites Work

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• Automatic Verification of Sequential Circuits Using Temporal Logic
• Up and Down The Temporal Way
• Hardware Specification with Temporal Logic: An Example

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