Using write caches to improve performance of cache coherence protocols in shared-memory multiprocessors

DOI10.1006/JPDC.1995.1059zbMath0939.68551OpenAlexW2088147613MaRDI QIDQ1893668

Fredrik Dahlgren, Per Stenström

Publication date: 20 July 1995

Published in: Journal of Parallel and Distributed Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1006/jpdc.1995.1059

Mathematics Subject Classification ID

Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Computer system organization (68M99)

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