Neural network training enhancement

DOI10.1007/BF01183155zbMath0858.68084OpenAlexW1982212364MaRDI QIDQ1922616

William A. Porter, Wei Liu

Publication date: 1 September 1996

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01183155

zbMATH Keywords

nonlinear embedding mapsnonlinear synaptic interconnects

Mathematics Subject Classification ID

Learning and adaptive systems in artificial intelligence (68T05)

Related Items (2)

Efficient exemplars for classifier design ⋮ On neural network design. II: Inhibition and the output map

Cites Work

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• Recent progress on higher order moment neural arrays
• Object recognition by a massively parallel 2-D neural architecture
• Polylogic Realization of Switching Functions
• Synthesis of Polynomic Systems
• On factoring the polyvariance operator
• Error Tolerant Design of Multivalued Logic Functions
• Using polynomic embedding for neural network design
• Channel identification for high speed digital communications
• Causal Realization from Input-Output Pairs

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