Packing circuits in eulerian digraphs

DOI10.1007/BF01844848zbMath0858.05051MaRDI QIDQ1924492

P. D. Seymour

Publication date: 24 November 1996

Published in: Combinatorica (Search for Journal in Brave)

zbMATH Keywords

digraphminordirected circuits

Mathematics Subject Classification ID

Paths and cycles (05C38) Edge subsets with special properties (factorization, matching, partitioning, covering and packing, etc.) (05C70) Directed graphs (digraphs), tournaments (05C20) Eulerian and Hamiltonian graphs (05C45)

Related Items (14)

Recent techniques and results on the Erdős-Pósa property ⋮ Towards a polynomial kernel for directed feedback vertex set ⋮ Kernels for deletion to classes of acyclic digraphs ⋮ Erdös-Pósa Property of Obstructions to Interval Graphs ⋮ Erdős–Pósa property of obstructions to interval graphs ⋮ Linkless and flat embeddings in 3-space ⋮ Packing cycles in graphs. II ⋮ Ranking tournaments with no errors. II: Minimax relation ⋮ Ranking tournaments with no errors. I: Structural description ⋮ Unnamed Item ⋮ Doubly stochastic matrices and dicycle covers and packings in Eulerian digraphs ⋮ Parameterised algorithms for deletion to classes of DAGs ⋮ Euler Digraphs ⋮ Feedback arc set problem and NP-hardness of minimum recurrent configuration problem of chip-firing game on directed graphs

Cites Work

• On two minimax theorems in graph
• Sachs' linkless embedding conjecture
• A Minimax Theorem for Directed Graphs

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