Logic synthesis for VLSI-based combined finite state machines. Synthesis targeting ASICs, CPLDs and FPGAs

DOI10.1007/978-3-031-16027-1zbMath1502.68007OpenAlexW4312374726MaRDI QIDQ2082085

Larysa Titarenko, Małgorzata Mazurkiewicz, Kamil Mielcarek, Elżbieta Kawecka, Alexander Barkalov

Publication date: 1 October 2022

Published in: Lecture Notes in Electrical Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-031-16027-1

Mathematics Subject Classification ID

Formal languages and automata (68Q45) Research exposition (monographs, survey articles) pertaining to computer science (68-02) Switching theory, applications of Boolean algebras to circuits and networks (94C11)

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