A monolithic hardware implementation of Kyber: comparing apples to apples in PQC candidates
From MaRDI portal
Publication:2146081
DOI10.1007/978-3-030-88238-9_6zbMath1489.68418OpenAlexW3203459837MaRDI QIDQ2146081
Reza Azarderakhsh, Mojtaba Bisheh-Niasar, Mehran Mozaffari-Kermani
Publication date: 15 June 2022
Full work available at URL: https://doi.org/10.1007/978-3-030-88238-9_6
Cryptography (94A60) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)
Related Items
Uses Software
Cites Work
- Unnamed Item
- Unnamed Item
- Speeding up the number theoretic transform for faster ideal lattice-based cryptography
- Efficient hardware implementations for elliptic curve cryptography over Curve448
- Memory-efficient high-speed implementation of Kyber on Cortex-M4
- Worst-case to average-case reductions for module lattices
- Efficient Implementation of True Random Number Generator Based on SRAM PUFs
- Towards Efficient Arithmetic for Lattice-Based Cryptography on Reconfigurable Hardware
- High-Performance Ideal Lattice-Based Cryptography on 8-Bit ATxmega Microcontrollers
- Supersingular Isogeny Key Encapsulation (SIKE) Round 2 on ARM Cortex-M4
- Compact Ring-LWE Cryptoprocessor
- An Algorithm for the Machine Calculation of Complex Fourier Series
This page was built for publication: A monolithic hardware implementation of Kyber: comparing apples to apples in PQC candidates