A hardware approach to value function iteration

DOI10.1016/J.JEDC.2020.103894OpenAlexW3010008199MaRDI QIDQ2191461

Alessandro Peri

Publication date: 25 June 2020

Published in: Journal of Economic Dynamics \& Control (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.jedc.2020.103894

zbMATH Keywords

dynamic programmingbusiness cyclesgrowth modelFPGApipelining

Mathematics Subject Classification ID

Game theory, economics, finance, and other social and behavioral sciences (91-XX)

Cites Work

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• Tapping the supercomputer under your desk: solving dynamic equilibrium models with graphics processors
• Comparing solution methods for dynamic equilibrium economies
• Benchmarking machine-learning software and hardware for quantitative economics
• RISK MEASURES ON P(R) AND VALUE AT RISK WITH PROBABILITY/LOSS FUNCTION
• Precautionary Savings, Illiquid Assets, and the Aggregate Consequences of Shocks to Household Income Risk

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