Automatic and hierarchical verification for concurrent systems

DOI10.1007/BF02945312zbMath0725.68044OpenAlexW2077833819MaRDI QIDQ2277847

Xudong Zhao, Yulin Feng

Publication date: 1990

Published in: Journal of Computer Science and Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf02945312

zbMATH Keywords

Petri netsbranching time temporal logiccorrectness of concurrent systems

Mathematics Subject Classification ID

Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

Cites Work

• Unnamed Item
• The temporal logic of branching time
• Hierarchical verification of asynchronous circuits using temporal logic
• Automatic verification of finite-state concurrent systems using temporal logic specifications
• Automatic Verification of Sequential Circuits Using Temporal Logic
• “Sometimes” and “not never” revisited

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