Transient and steady-state performance modeling of parallel processors
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Publication:2284147
DOI10.1016/S0307-904X(98)10062-8zbMath1428.68041OpenAlexW2067439680MaRDI QIDQ2284147
Publication date: 14 January 2020
Published in: Applied Mathematical Modelling (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/s0307-904x(98)10062-8
parallel processingmemory contentionperformance modelingassembly languagecache memoryinstruction set architecture
Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Mathematical problems of computer architecture (68M07)
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