ASIC implementation of area-efficient, high-throughput 2-D IIR filter using distributed arithmetic
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Publication:2312516
DOI10.1007/S00034-017-0698-ZzbMath1411.94111OpenAlexW2767213351MaRDI QIDQ2312516
Prashant Kumar, Prabhat Chandra Shrivastava, Manish K. Tiwari, Amit Dhawan
Publication date: 17 July 2019
Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s00034-017-0698-z
VLSI designraster scanningdistributed arithmetic2-D IIR filterhardware-based LUTmultiplier-less filters
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