The applicability of discrete performance estimation methods to VLSI design

DOI10.1007/BF01211303zbMath0771.68033MaRDI QIDQ2366696

Yanyan Li

Publication date: 18 August 1993

Published in: Formal Aspects of Computing (Search for Journal in Brave)

zbMATH Keywords

VLSI designperformance estimationasymptotic complexity resultsdiscret high-level VLSI complexity modelsspecification of synchronous concurrent algorithms

Mathematics Subject Classification ID

Circuits, networks (94C99) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Specification and verification (program logics, model checking, etc.) (68Q60)

Cites Work

• A model of computation for VLSI with related complexity results
• The Area-Time Complexity of Binary Multiplication
• A Regular Layout for Parallel Adders

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