An efficient universal addition scheme for all hybrid-redundant representations with weighted bit-set encoding
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Publication:2432112
DOI10.1007/S11265-005-4177-6zbMath1104.94067OpenAlexW2130333067MaRDI QIDQ2432112
Ghassem Jaberipur, Behrooz Parhami, Mohammad Ghodsi
Publication date: 25 October 2006
Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11265-005-4177-6
digit setcomputer arithmeticredundant number system\((4,2)\)-compressorcarry-free additionsigned digit
Cites Work
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- Further reducing the redundancy of a notation over a minimally redundant digit set
- A Two's Complement Parallel Array Multiplication Algorithm
- Hybrid signed-digit number systems: a unified framework for redundant number representations with bounded carry propagation chains
- Weighted two-valued digit-set encodings: unifying efficient hardware representation schemes for redundant number systems
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