High-speed and low-power IP for embedded block coding with optimized truncation (EBCOT) sub-block in JPEG2000 system implementation

DOI10.1007/S11265-005-4179-4zbMath1103.68551OpenAlexW2099918322MaRDI QIDQ2432120

Publication date: 25 October 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11265-005-4179-4

Mathematics Subject Classification ID

Computing methodologies for image processing (68U10) Coding and information theory (compaction, compression, models of communication, encoding schemes, etc.) (aspects in computer science) (68P30)

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