Hardware efficient fast computation of the discrete Fourier transform

DOI10.1007/S11265-005-4187-4zbMath1138.94320OpenAlexW1985770138MaRDI QIDQ2432132

Keshab K. Parhi, Chao Cheng

Publication date: 25 October 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11265-005-4187-4

zbMATH Keywords

discrete Fourier transformsystolic arraycyclic convolutionWinograd Fourier Transform algorithm

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Numerical methods for discrete and fast Fourier transforms (65T50)

Cites Work

• Unnamed Item
• Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse
• A new systolic array for discrete Fourier transform
• A New Array Architecture for Prime-Length Discrete Cosine Transform
• The efficient memory-based VLSI array designs for DFT and DCT
• An introduction to programming the Winograd Fourier transform algorithm (WFTA)
• A new systolic realization for the discrete Fourier transform
• A systolic array architecture for the discrete sine transform

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