A survey on lifting-based discrete wavelet transform architectures

DOI10.1007/s11266-006-4191-3zbMath1104.94064OpenAlexW1987589791MaRDI QIDQ2432154

Chaitali Chakrabarti, Tinku Acharya

Publication date: 25 October 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11266-006-4191-3

zbMATH Keywords

liftingdiscrete wavelet transformimage compressionarchitectureVLSI

Mathematics Subject Classification ID

Filtering in stochastic control theory (93E11) Computing methodologies for image processing (68U10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Numerical methods for discrete and fast Fourier transforms (65T50) Analytic circuit theory (94C05)

Related Items (2)

High-performance 1-D and 2-D inverse DWT 5/3 filter architectures for efficient hardware implementation ⋮ Investigation of lifting-based hardware architectures for discrete wavelet transform

Cites Work

• Factoring wavelet transforms into lifting steps
• Novel JPEG 2000 compliant DWT and IWT VLSI implementations
• The lifting scheme: A custom-design construction of biorthogonal wavelets
• Line-based, reduced memory, wavelet image compression
• Reversible integer-to-integer wavelet transforms for image compression: performance evaluation and analysis
• A theory for multiresolution signal decomposition: the wavelet representation
• Flipping Structure: An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform
• Efficient Architectures for 1-D and 2-D Lifting-Based Wavelet Transforms
• A parallel architecture for the 2-D discrete wavelet transform with integer lifting scheme

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