Modeling instruction semantics in ADL processor descriptions for C compiler retargeting

DOI10.1007/S11265-006-7273-3zbMath1103.68453OpenAlexW1995814010WikidataQ121816170 ScholiaQ121816170MaRDI QIDQ2432194

Rainer Leupers, Gunnar Braun, Jianjiang Ceng, Manuel Hohenauer, Weihua Sheng, Gerd Ascheid, Heinrich Meyr

Publication date: 25 October 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11265-006-7273-3

zbMATH Keywords

architecture description languageC compiler retargetingelectronic system levelembedded processor designprocessor model

Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20) Computer system organization (68M99)

Related Items (1)

Modeling instruction semantics in ADL processor descriptions for C compiler retargeting

Uses Software

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• MIMOLA

Cites Work

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• ISDL: An instruction set description language for retargetability and architecture exploration
• Modeling instruction semantics in ADL processor descriptions for C compiler retargeting

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