Analysis of dataflow programs with interval-limited data-rates

DOI10.1007/S11265-006-7274-2zbMath1103.68418OpenAlexW2059901923MaRDI QIDQ2432195

Shuvra S. Bhattacharyya, Jürgen Teich

Publication date: 25 October 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11265-006-7274-2

zbMATH Keywords

buffer memory analysisinterval ratesScheduling dataflow models of computation

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Related Items (1)

Exploiting the expressiveness of cyclo-static dataflow to model multimedia implementations

Cites Work

• Parameterized dataflow modeling for DSP systems
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