Reconfigurable signal processing and hardware architecture for broadband wireless communications
DOI10.1155/WCN.2005.323zbMath1123.94321DBLPjournals/ejwcn/LiangNPM05OpenAlexW2127097483WikidataQ59148881 ScholiaQ59148881MaRDI QIDQ2501730
Ying-Chang Liang, Santosh K. Pilakkat, Sayed Naveen, Ashok K. Marath
Publication date: 12 September 2006
Published in: EURASIP Journal on Wireless Communications and Networking (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1155/wcn.2005.323
cyclic prefixfrequency-domain equalizationsoftware-defined radiobroadband communicationsreconfigurable signal processing
Network design and communication in computer systems (68M10) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)
This page was built for publication: Reconfigurable signal processing and hardware architecture for broadband wireless communications