Scalable architecture for soC video encoders

DOI10.1007/S11265-006-5918-XzbMath1100.94034OpenAlexW2075805032MaRDI QIDQ2505078

Tero Kangas, Kimmo Kuusilinna, Timo Hamalainen

Publication date: 29 September 2006

Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11265-006-5918-x

zbMATH Keywords

architecture explorationSystem-on-Chipvideo encoding

Mathematics Subject Classification ID

Computing methodologies for image processing (68U10) Circuits, networks (94C99) Coding and information theory (compaction, compression, models of communication, encoding schemes, etc.) (aspects in computer science) (68P30) Source coding (94A29)

Cites Work

• Memory design and exploration for low power, embedded systems
• HIBI communication network for system-on-chip

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