Dynamic and formal verification of embedded systems: A comparative survey

DOI10.1007/S10766-005-8911-2zbMath1099.68659OpenAlexW1965917321WikidataQ59393616 ScholiaQ59393616MaRDI QIDQ2506271

Graziano Pravadelli, Tiziana Margaria, Mirko Loghi, Bernhard Steffen

Publication date: 28 September 2006

Published in: International Journal of Parallel Programming (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10766-005-8911-2

zbMATH Keywords

Embedded systemsvalidationfunctional test

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Uses Software

• SCADE
• MOTOR
• E-LOTOS
• IF-2.0
• LUSTRE
• Esterel

Cites Work

• Specification-oriented semantics for communicating processes
• Statecharts: a visual formalism for complex systems
• Verification of the link layer protocol of the IEEE-1394 serial bus (FireWire): An experiment with E-LOTOS
• Hybrid dynamical systems theory and the Signal language
• Model Checking Software
• Formal Methods for the Design of Real-Time Systems
• LSCs: Breathing life into message sequence charts
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item
• Unnamed Item

This page was built for publication: Dynamic and formal verification of embedded systems: A comparative survey