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A systolic LRU processor and its top-down development - MaRDI portal

A systolic LRU processor and its top-down development

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Publication:2639645

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DOI10.1016/0167-6423(90)90087-TzbMath0718.68056OpenAlexW1963600151MaRDI QIDQ2639645

Publication date: 1990

Published in: Science of Computer Programming (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-6423(90)90087-t

zbMATH Keywords

systolic systems LRU processor multi-level storage systems

Mathematics Subject Classification ID

Cellular automata (computational aspects) (68Q80) Theory of data (68P99) Computer system organization (68M99)

Related Items (1)

Correct translation of data parallel assignment onto array processors

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