Deriving approximate logic circuits for TMR technique

DOI10.1007/S11182-022-02693-3OpenAlexW4306938065MaRDI QIDQ2691013

G. G. Goshin, S. A. Ostanin, A. Yu. Matrosova

Publication date: 17 March 2023

Published in: Russian Physics Journal (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11182-022-02693-3

zbMATH Keywords

constant faultscombinational circuitapproximate logic circuitsirredundant system of sum of products (SoPs)reduced ordered binary decision diagrams (ROBDDs)test patterns for constant faultsTMR technique

Mathematics Subject Classification ID

Quantum theory (81-XX)

Cites Work

• Detection of Multiple Faults in Combinational Logic Networks

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