Resynchronization for multiprocessor DSP systems

DOI10.1109/81.895327zbMath0989.94014OpenAlexW2157983116MaRDI QIDQ2724315

Edward A. Lee, Sundararajan Sriram, Shuvra S. Bhattacharyya

Publication date: 25 March 2002

Published in: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/81.895327

zbMATH Keywords

multiprocessor schedulingset coveringshared memorydigital signal processingpipeliningreal-time signal processingself-timed systemsVLSI signal processingembedded multiprocessorsiterative dataflow graphsresynchronizaton

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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