Parallel merging on the instruction systolic array

DOI10.1080/00207160108805048zbMath0976.68020OpenAlexW2062923418MaRDI QIDQ2731075

O. K. Muslih, David J. Evans

Publication date: 2001

Published in: International Journal of Computer Mathematics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/00207160108805048

zbMATH Keywords

processor arrayinstruction systolic arrayinstruction broadcast arraysoft systolic simulation system

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Computer system organization (68M99)

Cites Work

• The instruction systolic array and its relation to other models of parallel computers
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