Improving Translation of Live Sequence Charts to Temporal Logic

DOI10.1016/J.ENTCS.2009.08.010zbMath1339.68168OpenAlexW2046266647MaRDI QIDQ2810977

Eric G. Mercer, Rahul Kumar, Annette Bunker

Publication date: 6 June 2016

Published in: Electronic Notes in Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.entcs.2009.08.010

zbMATH Keywords

reductionlinearpolynomialtranslationspintemporal logiclive sequence chart

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Temporal logic (03B44)

Related Items (1)

Verifying Communication Protocols Using Live Sequence Chart Specifications

Cites Work

• Unnamed Item
• Unnamed Item
• Unnamed Item
• Tools and Algorithms for the Construction and Analysis of Systems
• Formal Methods in Software and Systems Modeling
• Check It Out: On the Efficient Formal Verification of Live Sequence Charts
• LSCs: Breathing life into message sequence charts
• Verification of a radio-based signaling system using the STATEMATE verification environment

This page was built for publication: Improving Translation of Live Sequence Charts to Temporal Logic