Power-Clock Generator Impact on the Performance of NEM-Based Quasi-Adiabatic Logic Circuits

DOI10.1007/978-3-319-20860-2_17zbMath1464.68106OpenAlexW1151713425MaRDI QIDQ2822520

Hervé Fanet, Samer Houri, Alexandre Valentian, Gerard Billiot, Marc Belleville

Publication date: 30 September 2016

Published in: Reversible Computation (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-319-20860-2_17

zbMATH Keywords

adiabatic logicadiabatic chargingnanoelectromechanical relayspower-clock generatorquasi-adiabatic logic

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Mathematical problems of computer architecture (68M07) Networks and circuits as models of computation; circuit complexity (68Q06)

Cites Work

• Reversible Computing
• Irreversibility and Heat Generation in the Computing Process
• Limits of CMOS Technology and Interest of NEMS Relays for Adiabatic Logic Applications
• Unnamed Item

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