Very Compact Hardware Implementations of the Blockcipher CLEFIA

DOI10.1007/978-3-642-28496-0_17zbMath1292.94018OpenAlexW2182153974MaRDI QIDQ2889877

Harunaga Hiwatari, Toru Akishita

Publication date: 8 June 2012

Published in: Selected Areas in Cryptography (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-28496-0_17

zbMATH Keywords

blockcipherCLEFIAASICcompact hardware implementation

Mathematics Subject Classification ID

Cryptography (94A60)

Uses Software

• CLEFIA
• KTANTAN
• KATAN

Cites Work

• Unnamed Item
• Pushing the Limits: A Very Compact and a Threshold Implementation of AES
• On the Construction of Block Ciphers Provably Secure and Not Relying on Any Unproved Hypotheses
• The 128-Bit Blockcipher CLEFIA (Extended Abstract)
• Threshold Implementations Against Side-Channel Attacks and Glitches
• Ultra-Lightweight Implementations for Smart Devices – Security for 1000 Gate Equivalents
• Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
• KATAN and KTANTAN — A Family of Small and Efficient Hardware-Oriented Block Ciphers

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