Combining Multiplication Methods with Optimized Processing Sequence for Polynomial Multiplier in GF(2 k )

DOI10.1007/978-3-642-34159-5_10zbMath1304.94051OpenAlexW1426053258MaRDI QIDQ2920421

Frank Vater, Peter Langendörfer, Zoya Dyka

Publication date: 16 October 2012

Published in: Research in Cryptology (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-34159-5_10

zbMATH Keywords

hardware implementationpolynomial multiplicationECC

Mathematics Subject Classification ID

Cryptography (94A60) Data encryption (aspects in computer science) (68P25)

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