Higher-Order Glitch Resistant Implementation of the PRESENT S-Box
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Publication:2947102
DOI10.1007/978-3-319-21356-9_6zbMath1401.94146OpenAlexW2260260555MaRDI QIDQ2947102
Begül Bilgin, Thomas De Cnudde, Oscar Reparaz, Svetla Nikova
Publication date: 21 September 2015
Published in: Cryptography and Information Security in the Balkans (Search for Journal in Brave)
Full work available at URL: https://lirias.kuleuven.be/handle/123456789/481650
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Detecting Flawed Masking Schemes with Leakage Detection Tests ⋮ ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks
Cites Work
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- On the Simplicity of Converting Leakages from Multivariate to Univariate
- How to share a secret
- Higher-Order Glitches Free Implementation of the AES Using Secure Multi-party Computation Protocols
- The LED Block Cipher
- PRESENT: An Ultra-Lightweight Block Cipher
- Threshold Implementations Against Side-Channel Attacks and Glitches
- 256 Bit Standardized Crypto for 650 GE – GOST Revisited
- Higher-Order Masking Schemes for S-Boxes
- Towards sound approaches to counteract power-analysis attacks
- The PHOTON Family of Lightweight Hash Functions
- Topics in Cryptology – CT-RSA 2005
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