A Cache Hierarchy Aware Thread Mapping Methodology for GPGPUs

DOI10.1109/TC.2014.2308179zbMath1360.68063OpenAlexW2156144599MaRDI QIDQ2982295

Jing-Yang Jou, Bo-Cheng Charles Lai, Hsien-Kai Kuo

Publication date: 16 May 2017

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.2014.2308179

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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