A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor

DOI10.1109/TC.2015.2441696zbMath1360.68073OpenAlexW2309272862MaRDI QIDQ2985517

Tzung-Ching Lin, Kuo-Chiang Chang, Chih-Wei Liu, Shin-Kai Chen, Shih-Hao Ou

Publication date: 16 May 2017

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.2015.2441696

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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