An Efficient Method for Eliminating Random Delays in Power Traces of Embedded Software

DOI10.1007/978-3-642-31912-9_4zbMath1370.68080OpenAlexW1548028743MaRDI QIDQ3168616

Christof Paar, Daehyun Strobel

Publication date: 1 November 2012

Published in: Information Security and Cryptology - ICISC 2011 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-31912-9_4

zbMATH Keywords

random delaysside channel analysisembedded devicesalignment of power traces

Mathematics Subject Classification ID

Cryptography (94A60) Data encryption (aspects in computer science) (68P25)

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