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FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control

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Publication:3172962
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DOI10.1007/978-3-642-23951-9_2zbMath1401.94165OpenAlexW1717406790MaRDI QIDQ3172962

Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas

Publication date: 7 October 2011

Published in: Cryptographic Hardware and Embedded Systems – CHES 2011 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-23951-9_2



Mathematics Subject Classification ID

Cryptography (94A60) Random number generation in numerical analysis (65C10)


Related Items (2)

Survey on hardware implementation of random number generators on FPGA: theory and experimental analyses ⋮ Improved entropy bounds for parity filtered self-timed ring based random number generators







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