Higher-Order Glitches Free Implementation of the AES Using Secure Multi-party Computation Protocols
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Publication:3172965
DOI10.1007/978-3-642-23951-9_5zbMath1401.94169OpenAlexW2072356129MaRDI QIDQ3172965
Publication date: 7 October 2011
Published in: Cryptographic Hardware and Embedded Systems – CHES 2011 (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-642-23951-9_5
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Algebraic Decomposition for Probing Security ⋮ AES side-channel countermeasure using random tower field constructions ⋮ Complementing Feistel Ciphers ⋮ Masking Tables—An Underestimated Security Risk ⋮ Higher-Order Glitch Resistant Implementation of the PRESENT S-Box ⋮ Masking and leakage-resilient primitives: one, the other(s) or both? ⋮ Unifying leakage models: from probing attacks to noisy leakage ⋮ Threshold Implementation in Software ⋮ How Fast Can Higher-Order Masking Be in Software? ⋮ Codes for Side-Channel Attacks and Protections ⋮ Efficient Leakage Resilient Circuit Compilers ⋮ Leakage-Resilient Cryptography over Large Finite Fields: Theory and Practice ⋮ Polynomial Evaluation and Side Channel Analysis ⋮ ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks
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