Estimations of the lengths of tests for logic gates in presence of many permissible faults

DOI10.1134/S1990478915040122zbMath1349.94174MaRDI QIDQ3186843

Kirill A. Popkov

Publication date: 12 August 2016

Published in: Journal of Applied and Industrial Mathematics (Search for Journal in Brave)

zbMATH Keywords

diagnostic testlogic gatefaultlogic circuitcheck test

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cites Work

• Check and diagnostic tests for AND, OR, and NOT gates
• Fault detection and diagnostic tests for logic gates
• Method of synthesis of easily testable circuits admitting single fault detection tests of constant length
• On the synthesis of circuits admitting complete fault detection test sets of constant length under arbitrary constant faults at the outputs of the gates
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