Enabling 3-Share Threshold Implementations for all 4-Bit S-Boxes
From MaRDI portal
Publication:3193255
DOI10.1007/978-3-319-12160-4_6zbMath1445.94025OpenAlexW2113599371MaRDI QIDQ3193255
Axel Poschmann, Phuong Ha Nguyen, Sebastian Kutzner
Publication date: 16 October 2015
Published in: Information Security and Cryptology -- ICISC 2013 (Search for Journal in Brave)
Full work available at URL: http://hdl.handle.net/10220/18869
Related Items (6)
Efficient generation of quadratic cyclotomic classes for shortest quadratic decompositions of polynomials ⋮ Decomposition of permutations in a finite field ⋮ Uniform first-order threshold implementations ⋮ Threshold Implementation in Software ⋮ Cryptographic properties of small bijective S-boxes with respect to modular addition ⋮ New classes of $8$-bit permutations based on a butterfly structure
Cites Work
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Unnamed Item
- Secure hardware implementation of nonlinear functions in the presence of glitches
- Side-channel resistant crypto for less than 2,300 GE
- Cryptographic Analysis of All 4 × 4-Bit S-Boxes
- The Hummingbird-2 Lightweight Authenticated Encryption Algorithm
- Pushing the Limits: A Very Compact and a Threshold Implementation of AES
- Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
- $\textnormal{\textsc{TWINE}}$: A Lightweight Block Cipher for Multiple Platforms
- The 128-Bit Blockcipher CLEFIA (Extended Abstract)
- New Lightweight DES Variants
- Threshold Implementations Against Side-Channel Attacks and Glitches
- Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
- Serpent: A New Block Cipher Proposal
- Threshold Implementations of All 3 ×3 and 4 ×4 S-Boxes
- Keccak
- Power Analysis Attacks
- Cryptographic Hardware and Embedded Systems - CHES 2004
- Topics in Cryptology – CT-RSA 2005
This page was built for publication: Enabling 3-Share Threshold Implementations for all 4-Bit S-Boxes
