Wiring layouts in the tri-hexagonal grid∗

DOI10.1080/00207169008803944zbMath0723.68110OpenAlexW2104601159MaRDI QIDQ3210923

Ioannis. G. Tollis

Publication date: 1990

Published in: International Journal of Computer Mathematics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/00207169008803944

zbMATH Keywords

wiringlayer assignmentVLSI layoutstri-hexagonal grid

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Graph theory (including graph drawing) in computer science (68R10) Computing methodologies and applications (68U99) Circuits, networks (94C99)

Cites Work

• Optimal Three-Layer Channel Routing
• A unified approach to layout wirability

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