A Minimum Area VLSI Network for O(log n) Time Sorting

DOI10.1109/TC.1985.5009384zbMATH Open0556.68022MaRDI QIDQ3219772

Gianfranco Bilardi, F. P. Preparata

Publication date: 1985

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

zbMATH Keywords

parallel computationVLSI implementationhybrid architectureoptimal algorithmscube-connected cyclesparallel sorting algorithmsarea-time performancebitonic mergingcombination sortingorthogonal trees

Mathematics Subject Classification ID

Searching and sorting (68P10) Theory of operating systems (68N25)

Related Items (3)

A unified \(O(\log N)\) and optimal sorting vector algorithm ⋮ Optimal VLSI circuits for sorting ⋮ VLSI Sorting with Reduced Hardware

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