Iterative Exhaustive Pattern Generation for Logic Testing

DOI10.1147/rd.282.0212zbMath0529.94020OpenAlexW2100807758MaRDI QIDQ3312161

No author found.

Publication date: 1984

Published in: IBM Journal of Research and Development (Search for Journal in Brave)

Full work available at URL: https://semanticscholar.org/paper/5873f167c8575783f227ba4c5ba577d718f91962

zbMATH Keywords

logic circuit testing

Mathematics Subject Classification ID

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