Verification Testing—A Pseudoexhaustive Test Technique
From MaRDI portal
Publication:3321986
DOI10.1109/TC.1984.1676477zbMath0536.94014OpenAlexW2043949919MaRDI QIDQ3321986
Publication date: 1984
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.1984.1676477
Related Items (2)
The use of linear sums in exhaustive testing ⋮ Graph partitioning applied to the logic testing of combinational circuits
This page was built for publication: Verification Testing—A Pseudoexhaustive Test Technique