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The Design of Easily Testable VLSI Array Multipliers - MaRDI portal

The Design of Easily Testable VLSI Array Multipliers

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Publication:3321987

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DOI10.1109/TC.1984.1676480zbMath0536.94015OpenAlexW1970313909MaRDI QIDQ3321987

John P. Shen, F. Joel Ferguson

Publication date: 1984

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1984.1676480

zbMATH Keywords

exhaustive testing array multipliers VLSI testing C-testability

Mathematics Subject Classification ID

Related Items (1)

Testing in two-dimensional iterative logic arrays

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