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Input Variable Assignment and Output Phase Optimization of PLA's - MaRDI portal

Input Variable Assignment and Output Phase Optimization of PLA's

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Publication:3337381

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DOI10.1109/TC.1984.1676349zbMath0545.94023MaRDI QIDQ3337381

Tsutomu Sasao

Publication date: 1984

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

zbMATH Keywords

logic design arithmetic functions control circuits programmable logic array complexity of logic circuits decoder assignment essential prime implicants detection input variable assignment output phase assignment PLA minimization system

Mathematics Subject Classification ID

Related Items (1)

SAT-Based Formula Simplification

Uses Software

ESPRESSO

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