Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores
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Publication:3389737
DOI10.1109/TC.2020.2987314OpenAlexW3016309475MaRDI QIDQ3389737
T. Hoefler, Florian Zaruba, Fabian Schuiki, Luca Benini
Publication date: 23 March 2022
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.2020.2987314
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