Intel’s New AES Instructions for Enhanced Performance and Security

DOI10.1007/978-3-642-03317-9_4zbMath1291.94091OpenAlexW1531269151MaRDI QIDQ3391562

Shay Gueron

Publication date: 11 August 2009

Published in: Fast Software Encryption (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-03317-9_4

zbMATH Keywords

computer architectureadvanced encryption standardnew instructions set

Mathematics Subject Classification ID

Cryptography (94A60)

Related Items (9)

On modes of operations of a block cipher for authentication and authenticated encryption ⋮ Bloom Filters in Adversarial Environments ⋮ Fast garbling of circuits under standard assumptions ⋮ Simpira v2: A Family of Efficient Permutations Using the AES Round Function ⋮ The Software Performance of Authenticated-Encryption Modes ⋮ Implementing GCM on ARMv8 ⋮ Fast and Memory-Efficient Key Recovery in Side-Channel Attacks ⋮ Tweaking AES ⋮ Efficient implementation of the Galois counter mode using a carry-less multiplier and a fast reduction algorithm

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