Maximal strips data structure to represent free space on partially reconfigurable FPGAs
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Publication:3399241
DOI10.1080/17445760902720081zbMath1177.68057OpenAlexW2046283961MaRDI QIDQ3399241
Mostafa Elbidweihy, Jerry L. Trahan
Publication date: 29 September 2009
Published in: International Journal of Parallel, Emergent and Distributed Systems (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/17445760902720081
Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Data structures (68P05)
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