MINIMIZATION AND OPTIMIZATION OF REVERSIBLE BCD-FULL ADDER/SUBTRACTOR USING GENETIC ALGORITHM AND DON'T CARE CONCEPT
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Publication:3401881
DOI10.1142/S0219749909005523zbMath1185.81059OpenAlexW1970994125MaRDI QIDQ3401881
Majid Mohammadi, Majid Haghparast, Keivan Navi, Mohammad Eshghi
Publication date: 1 February 2010
Published in: International Journal of Quantum Information (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1142/s0219749909005523
synthesisquantum computationgenetic algorithmquantum logicreversible logic designdon't carereversible BCD adder
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Optimization approaches for designing quantum reversible arithmetic logic unit ⋮ On design of parity preserving reversible adder circuits ⋮ T-count optimized Wallace tree integer multiplier for quantum computing ⋮ NOVEL REVERSIBLE FAULT TOLERANT ERROR CODING AND DETECTION CIRCUITS ⋮ A novel fault-tolerant quantum divider and its simulation ⋮ Novel qutrit circuit design for multiplexer, de-multiplexer, and decoder
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