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VLSI algorithms, architectures, and implementation of a versatile GF(2/sup m/) processor - MaRDI portal

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VLSI algorithms, architectures, and implementation of a versatile GF(2/sup m/) processor

From MaRDI portal
Publication:3417043

DOI10.1109/12.888042zbMATH Open1314.94072OpenAlexW4232843579MaRDI QIDQ3417043

Author name not available (Why is that?)

Publication date: 9 January 2007

Published in: (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.888042



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