Testing cross-talk induced delay faults in digital circuit based on transient current analysis

DOI10.1007/BF02831794zbMath1115.68494OpenAlexW1999371670MaRDI QIDQ3443178

Jiang Cui, Rui Yao, Zhai Zhang, Xiaoqian Deng, Youren Wang

Publication date: 1 June 2007

Published in: Wuhan University Journal of Natural Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf02831794

zbMATH Keywords

SVMfault localizationdigital circuitcross-talkdelay faultIDDT

Mathematics Subject Classification ID

Learning and adaptive systems in artificial intelligence (68T05) Reliability, testing and fault tolerance of networks and computer systems (68M15)

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